The hottest electronic circuit design based on Bio

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Abstract: This paper introduces the mechanism and related technologies of evolvable hardware, focuses on a large-scale electronic circuit design method based on Genetic Algorithm in evolution theory, and analyzes how to achieve high fault tolerance design of complex systems through the mechanism of evolvable hardware. This paper introduces the design framework and basic design steps of evolutionary electronic circuit design, and the design environment to realize evolutionary electronic circuit design. The development prospect of electronic circuit design based on evolvable hardware is prospected

key words: evolvable hardware genetic algorithm electronic circuit design field programmable gate array

in human scientific research, many research results benefit from the inspiration of nature, such as bionics technology. With the development of computer technology and electronic technology, many scientific research is more and more closely linked with biology. In artificial intelligence, we have achieved the ability to see, listen, and think by using computers and electronic devices to imitate human organisms; On the other hand, inspired by the theory of evolution, scientists put forward the technology of electronic circuit design based on biology, and applied the method of evolution theory to the design of electronic circuits, so that new electronic circuits can have the characteristics of adaptation, immunity, self evolution and self replication to environmental changes like creatures, so as to realize highly adaptive and reliable electronic systems. Such electronic circuits are often called evolvable hardware (EHW). This paper mainly introduces the mechanism of evolvable hardware EHW and its related technologies, and discusses the design of high reliability electronic circuits based on this mechanism

1ehw mechanism and related technology

the problems required to be solved by the computer system are becoming more and more complex. At the same time, the structure of the computer system itself is also becoming more and more 5 Analog output interface ak288, digital output interface mk292, and serial synchronization interface SSI ⑴ 016 are more complex. The improvement of complexity means the reduction of reliability. Practical experience shows that it is almost impossible to achieve zero error rate for such a complex real-time system. Therefore, people place their hopes on the fault-tolerant performance of the system: that is, the adaptability of the system in the case of errors. Nature has given us an almost perfect blueprint for how to realize the complexity and reliability of the system at the same time. The human body is the most complex biological system we know so far. Through tens of millions of years of genetic evolution, the human body can continuously diagnose itself and finally heal itself in the case of some cell lesions. Therefore, using this mechanism, scientists have developed evolvable hardware (EHW). Ideal evolvable hardware not only has the ability of self diagnosis and can eliminate errors through self reconfiguration, but also can adapt the circuit to this change and continue to work normally through self reconfiguration when the design requirements or system working environment change. Strictly speaking, EHW has two purposes: one is to apply evolutionary algorithm to the design of electronic circuits; On the other hand, the hardware has the ability to adapt to changes by dynamically and autonomously reconstructing itself. The former emphasizes that evolutionary algorithm can replace the traditional specification based design method in electronic design; The latter emphasizes the adaptive mechanism of hardware. Of course, the difference between the two is also very vague. This paper mainly discusses the first aspect of EHW

the research on EHW mainly adopts the evolutionarycomputing algorithm in evolutionary theory, especially genetic algorithm (GA) as the design algorithm, field programmable gate array (FPGA) as the medium in digital circuit, and field programmable analog array (FPAA) as the medium in analog circuit design. In addition, there is a field programmable transistor array (FPTA) built at the transistor level, which provides a reliable platform for the simultaneous design of digital circuits and analog circuits. The following mainly introduces the relevant knowledge of genetic algorithm and field programmable gate array, and takes digital circuit as an example to introduce the design method of evolvable hardware

1.1 genetic algorithm

genetic algorithm is an adaptive global optimization algorithm that simulates the genetic and evolutionary process of organisms in the natural environment. It uses the idea of species evolution for reference, encodes the problem to be solved, and expresses the feasible solution in string form, which is called chromosome or individual. First, a group of individuals, called populations, are randomly generated through initialization, and they are all hypothetical solutions. Then put these hypothetical solutions into the environment of the problem, select individuals according to fitness or some competition mechanism (fitness is the satisfaction of the solution), and use various genetic operators (including selection, mutation, crossover, etc.) to produce the next generation (the next generation can completely replace the original population, that is, non overlapping population; it can also partially replace some poor individuals in the original population, that is, overlapping population), so as to evolve, Until the desired termination conditions are satisfied, the optimal solution of the problem is obtained

1.2 field programmable logic array (FPGA)

field programmable logic array is a programmable logic circuit based on lookup table (LUT) structure. Its working state is set by the program stored in the on-chip RAM, and the on-chip RAM needs to be programmed during operation. When the user describes a logic circuit through schematic diagram or hardware description language (HDL), the FPGA development software will compile the design scheme to form a data stream, and download the data stream to ram. The data flow in these ram determines the logical relationship of the circuit. After power failure, the FPGA is restored to white chip, and the internal logic relationship disappears. Therefore, the FPGA can be used repeatedly, and different hardware systems will be obtained by injecting different data streams. This is the programmable feature. This feature is an important feature to realize EHW. At present, virtex series FPGA chips of Xilinx company are most used in the design of evolvable electronic circuits

2 evolutionary electronic circuit design architecture

this section takes the design of digital circuit with high fault tolerance as an example to illustrate the design architecture and main design steps of EHW. For the genetic algorithm based on evolutionary theory to produce fault tolerance, the designed circuit system can be regarded as a continuous and real-time hardware system to adapt to changes. For electronic circuits, there are many sources of so-called changes, such as errors caused by hardware failures, changes in design requirements and rules, changes in the environment (the emergence of various interferences), and so on

from the perspective of evolution, when these changes occur, individual fitness will change accordingly. As evolution proceeds, individuals will adapt to these changes and regain high fitness. Electronic circuit design based on evolution theory uses this principle to improve its ability to adapt to changes by evolving the design results many times

the evolutionary design architecture of electronic circuits is shown in Figure 1. The figure shows two kinds of evolution of electronic circuit design, namely internal evolution and external evolution. Internal evolution refers to the evolution of the internal structure of hardware, while external evolution refers to the evolution of the circuit simulated by software. These two evolutions are independent of each other. Of course, the final design result obtained through external evolution should be actually reflected by the change of hardware structure. It can be seen from the figure that the evolution process is a cyclical process, which is carried out according to the calculation results of the evolutionary algorithm (genetic algorithm). The whole evolutionary design includes the following steps:

(1) according to the purpose of the design, a preliminary scheme is generated, and the preliminary scheme is represented by a set of chromosomes (a set of data strings represented by 0 and 1), in which each individual represents a part of the design. Chromosomes are transformed into control data stream and downloaded to FPGA to define the switching state of FPGA, so as to determine the connection of various units in reconfigurable hardware, forming a preliminary hardware system. FPGA devices used to design evolutionary hardware can accept any combination of data stream downloads without causing device damage

(2) compare the design results with the target requirements, and use some error expression as the measurement criterion to describe the system fitness. This requires the support of certain detection means and evaluation software. Different individuals are sorted according to fitness, and the next generation of individuals will be generated by the best individuals

(3) count the new individual group according to the fitness, and select some individuals according to the statistical results. Some selected individuals remain the same, while others are modified according to genetic algorithm, such as crossover and mutation, which aims to produce a more adaptive next generation. The new generation of chromosomes are transformed into control data streams and downloaded to FPGA to evolve the hardware

(4) repeat the above steps to generate new generations of individuals until the design scheme represented by the new individual shows the adaptability close to the requirements

generally speaking, one or more design results will be obtained through genetic algorithm, and the final design scheme has the best adaptability to the design requirements and system working environment. This process is also called internal evolution or hardware evolution

the right side of the figure shows another method of designing evolvable circuits, that is, using analog software to replace reconfigurable devices. Each bit of the chromosome determines the connection mode of the software analog circuit, rather than the connection mode of each unit of the reconfigurable device. This method is called external evolution or software evolution. In this method, the evolution process is completely simulated, and only the final result is implemented on the device

In evolutionary electronic circuit design, the key is the application of genetic algorithm. In the application of genetic algorithm, the determination of variation factor needs careful consideration. Its size is related to the degree that individual variation world vanadium production enterprises are mainly concentrated in South Africa, Russia, Brazil, New Zealand and China, and also to the ability of individuals to respond to environmental changes. These two factors conflict with each other. The larger the variation factor is, the easier the individual is to adapt to environmental changes and respond quickly to errors in the system, but the individual is more prone to mutation. When the variation factor is small, the reaction force of the system becomes worse, but once the system obtains a high fitness design scheme, it can remain stable

the design of evolvable digital circuits can be carried out at two levels. One is evolutionary design based on basic and, or and not gates, and the other is based on functional blocks such as flip flops, adders and multiplexers. The former method is more flexible, making the mobile 1 fixed distance, and the latter one is more suitable for industrial applications. Someone proposed a neural network module design architecture based on cellularautomaton. When adopting this structural design, we only need to define the adaptability of the whole module, and we can ignore how each module realizes its complex functions. For the design of super large-scale lines, we can use this method to

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